BUS Alıcı-Verici / BUS Transceiver

The BUS transceiver uses consecutive three-state buffers to connect different devices to a common communication bus that shares data in both directions.

The BUS Transceiver can be used to provide two-way, input or output control of digital or analog devices to a common shared bus.Unlike the bumper, transceivers are bidirectional devices that allow data to flow in both directions.

In Digital Buffer Training, we found that unlike digital logic gates with two or more inputs, a buffer does not have the ability to reverse or make decisions, but instead produces an output condition that exactly matches its input.Therefore, a buffer is a "non-inverting" device that produces the following Boolean expression: Q = A .

bus transceiver

A Digital Buffer similar to the one shown on the left is a one-way device, that is, the signal passes in only one direction, from the " A " inlet to the " Q " output.

Therefore, when entering, in a logic "1", output Q is a logical "1" and when entering a logic "0", output S is a logical "0" for a positive logic device, such as CMOS 74HC4050 HexAgon Bumper Gate.

Buffers can be used to isolate other doors or circuit stages from each other, preventing the impedance or operation of one circuit from affecting the impedance or operation of the other.In addition, on their own, buffers can be used as drives for high current loads such as transistor switches, since output drive capacities (fan-out) are often much higher than input signal requirements.For example, the TTL 74LS07 Hex bumper/drive with open collector has high voltage (30 volt) outputs.

Equivalent Bumper Designs

bus transceiver

One of the disadvantages of a single-input digital buffer is that the output in Q is at the same level of logic as the input, which probably affects any circuit or device connected to the bumper output terminal.One way to overcome this is to convert the basic buffer to the 3-State Buffer, more commonly known as the Three-State Buffer.

"Three-State Buffer"

A Three-State Buffer is another type of buffer circuit that can be used to control the transition of a logic signal from inlet to output.A three-state buffer is a unified device that can be electronically made "ON" or "OFF" via an external "Control" or "Enable" (EN) signal input that allows it to be used on bus-oriented systems.

As its name suggests, the output in " Q " for a Three-State Buffer can take one of three possible states, logic "0", logic "1" and High-Z (high impedance), that is, open circuit, instead of standard "0" and "1" states.

A buffer activation or control signal can be a logic "0" or a logic "1" level signal in which the output is inverted and not inverted when passing through the digital signal.The two most commonly used three-state buffers are IC, TTL 74LS125 and TTL 74LS126.

Therefore, a three-state buffer requires two entries.One is data entry ( A ) and the other is control or Activation input (EN), as shown.

Three-State Buffer Switch Equivalent

bus transceiver

The three-state buffer symbol is very similar to the standard buffer symbol above, but with the addition of a second entry that represents the activation/disabling control function.When the activation (EN) input is "1" at the logic level (for positive logic), it acts as a normal buffer that allows the input signal A to pass directly to the output in Q.Whether the logic is "0" or the logic is "1".

When activation input logic is in "0", the three-state buffer is activated to its third state, creating an open-circuit condition, disabling its output or making it "OFF".This third condition is neither in the logic of "1" (high) nor in the logic of "0" (low), but instead gives a very high impedance output state, High-Z , more commonly written as: Hi-Z .

Therefore, a three-state buffer has two logical state inputs, "0" or "1", but can produce three different output states: "0", "1" or "Hi-Z", so it is called "Tri". " or "3-state" device.Note that this third state is not equal to a logic level "0" or "1", but it is a high impedance state because its output is electrically disconnected.

Then, for a positively activated three-state buffer, we can correctly state:

  • If the activation signal is HIGH, if the logic is "1", the input signal of the buffer gate is transmitted directly to its output.
  • If the activation signal is LOW, if the logic is "0", the output of the buffer gateway acts as an open circuit, that is, high impedance (Hi-Z).

and the accuracy table for a three-state buffer as follows:

Active "HIGH" Three-State Buffer

bus transceiver

Three-state Bumpers are integrated as quad, hexagonal or octal bumper/drives, such as the TTL 74LS244, as shown.

74LS244 Octet Three-State Buffer

bus transceiver

Note that the eight buffers are configured in two groups of four, with the activation input of the first group (A1 to A4), the activation input controlled by the CA, and the activation input of the second group (A5 to A8) controlled by CB. The 74LS244 has very high receiver and welding current properties if necessary to replace transistor loads.

Three-State Buffer Control

So what can we use a 3-state or three-state buffer for?Three-state buffers can allow multiple devices to share a public output cable or bus at any given time by allowing only one three-state device to drive the cable path while all other buffers remain in Hi-Z states.Consider the circuit below.

Multiple three-state buffers on a single Bus

bus transceiver

The outputs of each three-state buffer are connected to a common cable bus, but their activation inputs are connected to a binary decoder.The decoder guarantees that only one three-state buffer will be active at any time due to the activation signal.

This allows the active buffer's data to pass directly to the public bus when inactive buffers are being actively disconnected and in a state of high impedance.Thus, which buffer is connected to the common line will depend on the binary value of the decoders' selection inputs.

Therefore, more than one three-state buffer cannot be "enabled" at any time.You may have noticed that the possible combination of different data inputs connected to a single output line above resembles a 4-on-1 line multiplexer, and you're right, multiplexer circuits can be easily created using three-state buffers.

Any three-state buffer element can be easily converted to a regular digital buffer by connecting activation (EN) inputs directly to +VCC or to the ground, depending on the three-state buffer used.Thus, the output is permanently activated so that any input signal present in " A " will pass directly from the buffer to the output in " Q ".

So far, we have seen that we can use three-state buffers to send information one way to a common cable or bus.But how can we use them to send data in both directions, that is, to send data and retrieve data from a common cable path.

Duplex Bumper Control

It is also possible to connect the Three-State Buffers "back to back" (inverted parallel) to produce what is called a Duplex Bumper or receiver-transmitter circuit.Using an additional inverter, one three-state buffer works as an "active-high buffer", while the other works as an "active-low buffer", as shown.

Multiple three-state buffers on a single Bus

bus transceiver

Here, two three-state buffers connect in parallel with the activation control input but inversely from " A " to " B " , acting as a more versatile control signal, thus allowing the data to be read and transmitted both from "dan". to the same data terminal.

Because the input is high, in this simple example, data is allowed to pass through (TR logic equals "1") A to B (TR logic equals "0") buffer with 1, and while input is LOW on, data passes through B to buffer A with 2.

Thus, the activation input "EN" acts as a directional control, allowing data to flow in both directions, depending on the logic state of this control entry.In this type of application, a three-state buffer with bidirectional switching, such as the TTL 74LS245 or the inverted CMOS 74ALS620, can be used to produce what is called a Bus Transceiver.

Bus Radios

Bus transceivers are three-state duplex devices that allow data flow between two points and align them with bus-oriented systems or two-way (input or output) control of the interface circuit.The bus can be TTL 74LS242 that reverses transceivers or TTL 74LS243 devices that do not invert.

Therefore, we can use an 8-line octet transceiver to interface any input/output device into an 8-bit bus, the most common bus transceiver IC is the TTL 74LS245 given below, which is used both to send and receive data.

74LS245 Bus Transceiver

bus transceiver

The TTL 74LS245 is an octa bus transceiver (Transmitter/Receiver) designed for asynchronous two-way communication between two busses or input/output devices.The transceiver allows data transmission from terminals A to terminals B or vice versa, depending on the level of logic at the direction control (DIR) entry (pin 1).

For example, if the direction control input is HIGH at the logic level "1", the data terminal set will switch from A to terminal set B. If the directional control input is LOW at the logic level "0", switch from data terminal set B to terminal set A in the opposite direction.

Therefore, when the logic level is kept HIGH in "1", the output chip activation (CE) input (pin 19) can be used to disable the device, so that the terminals and therefore any connected bus are effectively isolated from each other in the circuit. A Hi-Z situation.