FET Current Sources

In today's article, we will see FET Current Sources. A FET constant current source is a type of active circuit that uses an area-effect transistor to provide a constant amount of current to a circuit. At this point, there is an important question that we need to ask ourselves. Why you need a constant current

Constant current sources are a very simple way to create biasing circuits or voltage references with a constant current value of 100ua, 1ma or 20mA using only a single FET and resistance. Constant current sources are widely used in capacitor charging circuits or rechargeable battery charging applications for accurate timing purposes, as well as linear LED circuits to drive LEDs at constant brightness.

Resistant voltage references can also be generated using constant current sources. Because if you know the value of resistance and the current flowing through it is constant, you can use the Ohm law to find the voltage drop. However, the key to creating an accurate and reliable constant current source depends on the use of low FET conductivity as well as precise resistance values to convert the current into a precise and stable voltage.

Field-effect transistors are widely used to create a current source with Junction-FET's (FETTs) and Metal oxide semiconductor MOSFETs already used in low current welding applications. In its simplest form, JFET can be used as a voltage-controlled resistance, where a small gate voltage controls the transmission of the channel.

In our training on JFETs, we found that JFET is depletion devices and that the n-channel JFET is a "normally on" device until it is negative enough to "turn off" the voltage (VGS) from gate to source. P-channel JFET, which is also a "normally on" depletion device, requires that the door voltage be positive enough to make it "off".

N-channel JFET Biasing

FET Current Sources
N-channel JFET Biasing

When used in the Active zone, normal biasing indicates the standard arrangement and connections for a common source configured N-channel JFET. Here, the vgs gate source voltage is equal to the gate source or VG input voltage. This adjusts the reverse biasing between the gate and the source, while the VDD provides drain voltage from drain to source and flow of current from drain to sourca. This current entering the JFET discharge terminal is labeled ID.

Drain source voltage VDS is the advanced voltage drop of JFET and is a function of the drain current, id for different gate source values of VGS. While VDS is minimal, JFET's conductive channel is fully open and id is at its maximum value, called drain-to-source saturation stream ID (sell) or IDSS only.

When the VDS is at its maximum value, the conductor channel of the jfet is completely closed (compressed). Therefore, the ID is reduced to zero with drain-source voltage. VDS, drain supply voltage is equal to VDD. The vgs gate voltage, which the JFET channel stops transmitting, is called vgs gate cutting voltage (off). This common source biasing arrangement of N-channel jfet determines the stable state work of the jfet in the absence of any input signal.

Therefore, gate source voltage VGS for a JFET with a common source controls how much current flows through the conductor channel between the drain and the source. This makes the jfet a voltage-controlled device. Because the input voltage controls the channel current. As a result, we can develop a series of output characteristic curves by drawing ID against VGS for any JFET device.

N-Channel JFET Output Characteristic

FET Current Sources
N-Channel JFET Output Characteristic

JFET as Constant Current Source

Then we can see that the n-channel JFET is normally an open device, and if the VGS is negative enough, the drain source conductor channel is closed (cut) and the drain current drops to zero. For N-channel JFET, the closure of the conductive channel between drain and source is caused by the expansion of the p-type depletion zone around the door until it completely closes the channel. N-type depletion zones close the channel for a p-channel JFET.

Therefore, by adjusting the gate source voltage to a predetermined constant negative value, we can cause the JFET to transmit a certain value of current through its channel between zero amps and IDSS, respectively. Consider the circuit below.

JFET Zero Voltage Biasing

FET Current Sources
JFET Zero Voltage Biasing

We found that JFET's output properties curves are an ID graph against VGS for a fixed VDS. However, we realized that the curves of JFET do not change much with the major changes in VDS, and this parameter can be very useful in creating a fixed working point of the conductive channel.

The simplest constant current source is that the jeft short circuits the source terminal as shown in the gate terminal, the conductor channel of the JFET is open. Thus, the current flow through it will be close to the maximum IDSS value due to the operation of the jfet in the saturated current zone. However, the operation and performance of such a constant current configuration is quite poor. Because JFET is constantly in full transmission with IDSS current value depending entirely on the device type.

For example, the 2n36xx or 2n43xx n-channel JFET series is only a few mill-amps (mA), while the larger n-channel J1xx or PN4xxx series can be several on milliampers. Also note that IDSS will vary greatly between idss, the minimum and maximum values of this zero gate voltage discharge current, between devices with the same part number that manufacturers offer in their datasheet.

Another point to note is that a FET is basically a voltage-controlled resistance with a serially resistant value with conductive channel drain and source terminals. This channel resistance is called RDS. As we can see, when VGS = 0, the maximum drain-source current flows. Therefore, the channel resistance of the jfet should be at the minimum rds, and this is true.

However, the channel resistance is not completely zero, but at some low ohmic values defined by the production geometry of FET, which can be as high as 50 Ohm. When transmitting a FET, this channel resistance is commonly known as RDS(ON) and is of minimum resistance value when VGS = 0. Therefore, a high RDS(ON) value results in a low IDSS, and vice versa.

Therefore, a JFET can be biased to operate as a constant current source device at any current value below the saturation current, IDSS when VGS equals zero volts. When VGS is at VGS (off) cutting voltage level, there will be zero discharge current (ID = 0) when the channel is closed. Therefore, the channels drain the current, the ID will always flow as long as the JFET device is operated within its active zone as shown.

JFET Transfer Curve

FET Current Sources

Note that for a P-channel JFET, the VGS (off) cutting voltage will be a positive voltage, but the saturation current will be the same as that of an N-channel device of the IDSS obtained when vgs equal zero volts. Also note that the transfer curve is not linear, since the discharge current increases faster than the opening channel as the vgs approach zero volts.

JFET Negative Voltage Biasing

FET Current Sources

We remember that JFET is a depletion mode device that is always "on". Therefore, it requires a negative door voltage for N-channel JFETs and a positive door voltage for P-channel JFETs. "off". The biasing of a positively voltage N-channel JFET or a negative-voltage p-channel JFET bias will further open the conductive channel and force the channel current beyond IDSS.

But if we use the characteristic curves of the ID against VGS, we can adjust VGS to some negative voltage levels, for example-1v,- 2V or-3V, we can create a constant supply of JFET constant current at any current level we need between zero and IDSS.

However, for a more accurate constant current source with improved regulation, it is better to bias the JFET at approximately 10% to 50% of the maximum IDSS value. This also helps with I2*r power losses along the resistant channel and therefore reduces the heating effect.

JFET Drain Current Equation

FET Current Sources
JFET Drain Current Equation

JFET Current Source

A JFET can be made to work as a voltage-controlled constant current source when the gate source connection is reverse biasing, and we need a-VGS for an N-channel device and a +VGS for a P-channel device. The problem here is that JFET requires two separate voltage sources, one for VDD and one for VGS.

However, if we place a resistance between the source and the soil (0 volts), we can achieve the vgs self-biased filtering required for the JFET to operate as a constant current source using only the VDD supply voltage. Consider the circuit below.

FET Current Sources

At first glance, you might think that this configuration is very similar to a JFET common drain circuit that we see in the JFET tutorial.

However, the difference this time is that although the gate terminal of FET is still directly connected to the soil (vg = 0), the source terminal is at a voltage level above zero voltage grounding due to the voltage drop in the source resistance RS. Therefore, with a channel current flowing from the external source resistance, the voltage of the jfet from gate to source is < 0) daha az (daha negatif) olacaktır.

External source resistance RS provides a feedback voltage used to self-bias the gate terminal of the jfet, which keeps the drain current constant along the channel despite any changes in drain source voltage. Therefore, the only voltage source we need is the supply voltage VDD to ensure discharge current and biasing. Therefore, JFET uses voltage drop along the source resistance (VRS) to adjust the vgs gate biasing voltage and therefore the channel current as we see above.

Manufacturer datasheets for a specific N-channel JFET will give us VGS(off) and IDSS values. Knowing the values of these two parameters, we can transfer the above JFET equation for drain current, id to find VGS value for any value of drain current, ID between zero and IDSS as shown.

JFET Gate Source Voltage equation

FET Current Sources
JFET Gate Source Voltage equation

After finding the gate-to-source voltage required for a specific drain current, the value of the required source biasing resistance value is found using the Ohm Act as r = V/I:

JFET Source Resistance Equation

FET Current Sources
JFET Source Resistance Equation

FET Fixed Current Source Example

An N-channel JFET is required to change the brightness of the 5mm round red LED load from 8mA to 15 mA. If the JFET constant current source circuit is fed from a DC source of 15 volts, let's calculate the source resistance of the jfet required to illuminate the LED between minimum and maximum brightness when the maximum VGS(off) value of the switching JFET is -4.0 volts and VGS = 0, and it has 20mA IDSS.

1). ID for VGS = 8mA

FET Current Sources

2). ID for VGS = 15mA

FET Current Sources

Then we will need an external pocinciometer that can change its resistance from 36Ω to 184Ω. The nearest preferred pocinciometer value will be 200Ω.

Adjustable JFET Constant Current Welding

FET Current Sources

A pocinciometer or trimmer used instead of a constant value source resistance, RS, will allow us to change or fine-tune the current flowing through the conductor channel of the jfet.

However, in order to ensure good current regulation and therefore a more stable current flow through the FET device, it is better to limit the maximum channel current flowing from the LED (15mA in this example) to 10% to 50% of the JFETS IDSS value.

Creating constant current sources using MOSFETs provides much larger channel currents and better current regulation, and unlike JFETs, which are only normally available as open depeletion mode devices, MOSFETs are available in both exhaustion mode (normally on) and development mode (normally off).