# Logical VE (AND) Gate / Logic AND Gate

In today's article, we will examine one of our logistics doors, the VE door. The exit status of the "VE" logic door will be all kinds of "0" (Low), regardless of what the other is, when any of its inputs are at the logic level "0". In other words, as long as one of the entries is "0", the output will always be "0".

Of course, all of these logistic doors have mathematical expressions of their working status. In fact, these mathematical expressions make our job very easy when installing and analyzing these circuits. For this reason, the mathematical expression of our logical door "VE" will be as follows.

## Simple AND Door Circuit

One of the best ways to learn about a subject is to do small projects about it. Then let's set up a simple "VE" Gate circuit with the transistor.

At this point, we attach our resistance to the base end of the T1 and T2 transistors. Anyway, when we look at this connection scheme, we understand that our circuit belongs to the RTL (Resistance – Transistor – Logic) family, which is one of the logical families of digital electronics.

Logic doors are used to produce the desired logical function in electronic circuits. As we can extract from the mathematical formula we learned above, each of these logistic doors has a special table. These tables help us a lot when scathing our electronic circuitry. The picture we observed right next to the painting is the symbol that our "VE" door appears during the circuit drawing. These symbols will not change in general, no matter where you go in the world.

## Table of Logical AND Gate with 3 Inputs

In these 2 tables that we have examined, the logic is exactly the same. At this point, one of the most important points to quickly grasp the subject is your dominance of the Boolean pocket.

Today, there are many VE Gate integrations. Some of these consist of technologies such as TTL or CMOS, as we mentioned in our first article. To give an example of both: