What is Shift Register?

Sıralı Mantık Devreleri
Sıralı Mantık DevreleriShift RegisterT-tipi Flip Flop
JK Flip FlopJohnson Ring SayıcıD-tipi Flip Flop
MultivibratörlerFlip-Flop Dönüşümleri

This sequential device loads the data contained in its inputs and then moves or "scrolls" to its output once in each clock cycle, hence what is called shift register.

A Shift Register consists mainly of several one-bit "D-Type Data Latch" that connects to each other, with a logic of "0" or "1", one for each data bit. A data latch becomes the input of the next latch, and so on.
Data bits will be sorted in series inside or outside a Shift Register, that is, one after the other in the left or right direction. In addition, they can be fed together at the same time in a parallel configuration.

The number of data latches required to create a single Shift Register device is usually determined by the number of bits to store. The most common is 8 bits (one byte) wide, consisting of eight separate data latches.

Shift Register is used to store or move data. Therefore, it is widely used on calculators or computers to store data such as two binary numbers before they are added together, or to convert data from serial format to parallel format. All of the data latches that make up a single Shift Register are triggered by a common clock (Clk) signal that makes synchronous devices.

  • Serial input to parallel output (SIPO) – This register is loaded with serial data with one bit at a time. The saved data can be used in parallel with the output.
  • Serial input to serial output (SISO) – data is shifted from the registry to serial "input" and "output", one bit at a time in the left or right direction under clock control.
  • From parallel input to serial output (PISO) – parallel data is loaded into the registry at the same time and scrolled out of the registry in one bit series at a time under clock control.
  • Parallel input to parallel output (PIPE) – parallel data is loaded into the registry at the same time and transferred together to outputs related to the same time pulse.

The effect of left-to-right data movement through a Shift Register can be presented graphically as follows:

shift register
impact of left-to-right data movement

Furthermore, the directional movement of data through a shift register becomes duplex so that there can be both left and right shifts from left to right or right to left or even within the same register. This image assumes that all data has shifted to the right.

Serial Input to Parallel Output (SIPO)

Shift Register from 4-Bit Serial Entry to Parallel Output

shift register
Shift Register from 4-Bit Serial Entry to Parallel Output

Suppose all flip-flops (FFA to FFD) are new RESET (Clear input) and all QA-QD outputs are at the "0" logic level, that is, there is no parallel data output.

If a logic "1" is connected to the FFA's data entry pin, the output of the FFA in the first hour pulse and therefore the resulting QA will be set high to the logic "1", and all other outputs will still remain low in the "0" logic.

The data was then converted from a serial data input signal to a parallel data output. The accuracy table and the following waveforms show the spread of the logic "1" through left-to-right recording as follows:

Basic Data Movement with Shift Register

shift register
Basic Data Movement with Shift Register
shift register

Note that after the fourth hour pulse ends, 4-bit data ( 0-0-0-1 ) is stored in the registry and will remain there provided that the recording time stops. In practice, login data to the registry can consist of various combinations of the logic "1" and "0". Commonly available SIPO ICs include the standard 8-bit 74LS164 or 74LS594.

Serial Input to Serial Output (SISO)

This shift register is very similar to the SIPO above, but before the data is read directly from QA-QD outputs in parallel, this time the data is allowed to flow directly through the recording and out of the other end. Because there is only one output, shift register leaves one bit at a time in the serial layout.

Shift Register from 4-Bit Serial Entry to Serial Output

shift register
Shift Register from 4-Bit Serial Entry to Serial Output

If the output data is exactly the same as the input data; You can think about what the purpose of a SISO shift register is, which would be very normal. This type of shift register also functions as a temporary storage device or can act as a time delay device for data. The amount of time delay can be controlled by the number of stages in the register by 4, 8, 16, etc., or by changing the application of clock pulses. Commonly found IC's, 74hc595 8-bit SISO Shift Register.

Parallel Input to Serial Output (PISO)

Piso Shift Register works in the opposite way to the PIPO Shift Register above. The data is saved to the RECORD's PD in parallel, where all data bits enter their input at the same time. The data is then read in normal shift-right mode, in order from record to PD in Q, which represents the data contained in the Pa.

Shift Register from 4-Bit Parallel Entry to Serial Output

shift register
Shift Register from 4-Bit Parallel Entry to Serial Output

This type of shift register can send many different input lines directly to a computer, as it converts parallel data, such as an 8-bit word of data, into serial format. In addition, it can be used to pluralizing a single series of data streams that can be transmitted over a communication line. Commonly available IC's include 74HC166 8-bit parallel input/serial output scroll registers.

Parallel Input to Parallel Output (PIPE)

Shift Register from 4-Bit Parallel Entry to Parallel Output

shift register
Shift Register from 4-Bit Parallel Entry to Parallel Output

The PIPO shift register is the simplest of the four configurations because it has only three connections, consisting of parallel input (PI), parallel output (PO) and sort time signal (Clk), which determine what enters the flip-flop.

Shift Register Summary

  • A simple shift register can be made using a type D flip-flop, which is only one flip-Flop per data bit.
  • The output of each flip-Flop is connected to the D input to the right of the flip-flop.
  • Shift Registerler keeps data in memory that is moved or "shifted" to its desired locations every hour of impact.
  • Each hour pulse shifts the recording content left or right to a bit position.
  • Data bits can be loaded one bit at a time in a serial input (SI) configuration, or they can be loaded simultaneously in parallel configuration (PI).

Shift Registers are a topic of many features like these, but regardless, we have a good knowledge of this article. Now, to go further in this, we suggest that you read our article with Arduino about the use of shift register. As a result, everything you see from now on will add extra experience to you.